Architectural optimization for low power in a reconfigurable UMTS filter
Dasalukunte, Deepak and Palsson, Andri and Kamuf, Matthias and Persson, Per and Veljanovski, Ronny and Owall, Viktor (2006) Architectural optimization for low power in a reconfigurable UMTS filter. In: Proceedings of the 9th International Symposium on Wireless Personal Multimedia Communications, 17-20 September 2006, San Diego, California, USA.Full text for this resource is not available from the Research Repository.
This paper presents an improved architecture for an UMTS filter which reduces the switching power within the filter by 75% compared to the original design. The filter length is dynamically varied depending on the adjacent channel noise. This attains the least power consumption in noise free environments and required filter performance in the presence of noise. As a consequence, the battery life of the mobile device is improved without compromising with the 3GPP standard filter specifications. Furthermore, the design is simplified by reducing the number of clock domains from 3 to 2. In the improved design most blocks run at a slower clock, reducing switching power, and thus the overall power consumption.
|Item Type:||Conference or Workshop Item (Paper)|
|Uncontrolled Keywords:||technology, engineering, UMTS, 3GPP, reconfigurable, low power|
|Subjects:||RFCD Classification > 290000 Engineering and Technology
Faculty/School/Research Centre/Department > School of Engineering and Science
RFCD Classification > 280000 Information, Computing and Communication Sciences
|Depositing User:||Ms Phung T Tran|
|Date Deposited:||30 Oct 2008 01:59|
|Last Modified:||16 Oct 2010 00:44|
|ePrint Statistics:||View download statistics for this item|
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