Design and implementation of reconfigurable filter
Veljanovski, Ronny and Singh, J and Faulkner, Michael (2003) Design and implementation of reconfigurable filter. Electronics Letters, 39 (10). pp. 813-814. ISSN 0013-5194Full text for this resource is not available from the Research Repository.
Control unit design, dynamic analysis and VLSI implementation of a reconfigurable digital filter for an UTRA-TDD mobile receiver are described. A 60% average power reduction is recorded for the receiver filter compared to a static length filter meeting 3GPP specifications.
|Uncontrolled Keywords:||VLSI, application specific integrated circuits, digital filters, digital integrated circuits, mobile radio, radio receivers, dynamic analysis, power reduction, reconfigurable digital filter, control unit design, time division duplex environment|
|Subjects:||RFCD Classification > 290000 Engineering and Technology
Faculty/School/Research Centre/Department > School of Engineering and Science
|Depositing User:||Ms Phung T Tran|
|Date Deposited:||01 Mar 2009 18:09|
|Last Modified:||05 Jul 2011 03:39|
|ePrint Statistics:||View download statistics for this item|
|Citations in Scopus:||4 - View on Scopus|
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