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Optimal Memory Size Formula for Moving-Average Digital Phase-Locked Loop

Ahn, CK, Shi, Peng ORCID: 0000-0001-8218-586X and Hyun You, S (2016) Optimal Memory Size Formula for Moving-Average Digital Phase-Locked Loop. IEEE Signal Processing Letters, 23 (12). 1844 - 1847. ISSN 1070-9908

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Item Type: Article
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© 2016 IEEE.Personal use of this material is permitted. Permission from IEEE must be Obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

Uncontrolled Keywords: moving-average DPLL; memory size; signal processing
Subjects: FOR Classification > 0103 Numerical and Computational Mathematics
FOR Classification > 0906 Electrical and Electronic Engineering
Faculty/School/Research Centre/Department > Institute for Sustainability and Innovation (ISI)
Depositing User: Symplectic Elements
Date Deposited: 20 Aug 2018 03:07
Last Modified: 19 Sep 2019 23:23
URI: http://vuir.vu.edu.au/id/eprint/36906
DOI: https://doi.org/10.1109/LSP.2016.2623520
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Citations in Scopus: 3 - View on Scopus

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