Architectural optimization for low power in a reconfigurable UMTS filter
Download
Download
Download
Full text for this resource is not available from the Research Repository.
Export
Dasalukunte, Deepak, Palsson, Andri, Kamuf, Matthias, Persson, Per, Veljanovski, Ronny and Owall, Viktor (2006) Architectural optimization for low power in a reconfigurable UMTS filter. In: Proceedings of the 9th International Symposium on Wireless Personal Multimedia Communications, 17-20 September 2006, San Diego, California, USA.
Abstract
This paper presents an improved architecture for an UMTS filter which reduces the switching power within the filter by 75% compared to the original design. The filter length is dynamically varied depending on the adjacent channel noise. This attains the least power consumption in noise free environments and required filter performance in the presence of noise. As a consequence, the battery life of the mobile device is improved without compromising with the 3GPP standard filter specifications. Furthermore, the design is simplified by reducing the number of clock domains from 3 to 2. In the improved design most blocks run at a slower clock, reducing switching power, and thus the overall power consumption.
| Item type | Conference or Workshop Item (Paper) |
| URI | https://vuir.vu.edu.au/id/eprint/1563 |
| Official URL | http://luur.lub.lu.se/luur?func=downloadFile&fileO... |
| Subjects | Historical > RFCD Classification > 290000 Engineering and Technology Historical > Faculty/School/Research Centre/Department > School of Engineering and Science Historical > RFCD Classification > 280000 Information, Computing and Communication Sciences |
| Keywords | technology, engineering, UMTS, 3GPP, reconfigurable, low power |
| Download/View statistics | View download statistics for this item |
CORE (COnnecting REpositories)